Pre-reflow SMT process control
Solder Paste Inspection Service for SMT PCB Assembly
YourPCB uses solder paste inspection as an early decision gate for SMT assembly programs where paste volume, stencil setup, fine-pitch packages, and first article evidence can decide whether the lot should continue or stop for correction.
TL;DR
- SPI catches paste defects before placement and reflow make them expensive.
- Use it for fine pitch, QFN, BGA, 0201, and first article SMT builds.
- Good SPI feedback should improve stencil design, not only reject boards.
- Send paste layers, BOM, XY data, stencil notes, quantity, and defect history.
What We Control Before Reflow
Solder paste inspection is a pre-reflow inspection method that measures paste deposits after stencil printing. SMT is a PCB assembly process that places surface-mount components onto printed paste. PCBA is a populated circuit board that must pass workmanship, electrical, and customer release checks before it moves into the product.
3D Paste Volume Review
We use SPI as an early process gate for paste height, area, volume, offset, bridging risk, and insufficient-deposit trends before parts are placed.
Stencil and Aperture Feedback
Pad geometry, fine-pitch apertures, QFN thermal pads, BGA escape regions, and tombstoning-prone passives are reviewed when SPI results show repeat patterns.
First Article Correlation
SPI findings are compared with post-placement AOI, post-reflow AOI, X-ray for hidden joints, and functional test results instead of being treated as a standalone report.
High-Mix SMT Setup Control
Paste lot, stencil revision, printer setup, board support, wipe frequency, and operator notes are tied to the build revision for prototype and low-volume programs.
Defect Prevention Workflow
The goal is to stop predictable opens, bridges, skew, solder balls, voiding contributors, and insufficient fillets before reflow locks the defect into the PCBA.
Buyer-Visible Release Notes
When a lot has schedule pressure or split delivery, SPI status can be summarized with inspection holds, rework decisions, and shipment release notes.
Real Project Snapshot
Schedule visibility for a split-delivery robotics PCBA build
In 2026-Q1, a Singapore robotics OEM needed PCB and assembly support for a product rollout structured as a multi-PO program with split PIs. One constrained purchase order created timeline risk, so the order-management route required immediate communication before the build created a delivery dispute.
The concrete controls included same-day payment confirmation and an early delivery warning issued while other split deliveries stayed visible. SPI belongs in that same operating model: if paste data says the lot should stop, the buyer sees the warning before reflow, rework, and shipment timing are affected.
Capability Boundaries
SPI is not a cosmetic inspection step; it is a process-control gate for solder deposits. We align the acceptance language with public references for IPC electronics standards and customer drawings, then connect the result to the actual SMT route. The tradeoff is simple: stopping after a bad print costs less than diagnosing the same paste defect after reflow, X-ray, and functional test.
| Best-fit builds | Prototype SMT assembly, fine-pitch boards, BGA and QFN assemblies, pilot lots, and low-volume repeat PCBAs |
|---|---|
| Primary inspection gate | 3D solder paste inspection after stencil printing and before pick-and-place |
| Typical risk signals | Insufficient paste, excess paste, offset deposits, bridging, slumping, missing deposits, and repeat aperture trends |
| Inputs to quote | Gerber or ODB++, paste layer, BOM, XY data, stencil notes, target quantity, component pitch, and known defect history |
| Companion checks | AOI, X-ray for hidden joints, ICT, flying probe, functional test, and first article inspection |
| Common controls | Stencil revision, paste lot, printer settings, board support, wipe interval, reflow profile, and operator route notes |
| Standards context | IPC-A-610 acceptability language, IPC-J-STD-001 process discipline, ISO 9001 record control, and customer release limits |
Where SPI Changes the Build Decision
A quality management system such as ISO 9000 does not make every SMT job identical. It requires the factory to define controlled checkpoints that match product risk, revision maturity, and buyer release expectations.
Fine-pitch QFP or dense 0201 area
Paste offset and volume balance
Small pitch leaves less margin for bridging, opens, and shifted deposits after placement.
QFN with large thermal pad
Aperture split and excess paste control
Too much paste can lift the package, increase voiding risk, or create uneven solder stand-off.
BGA or hidden-joint assembly
Pre-reflow paste consistency plus later X-ray
SPI cannot see the solder joint after reflow, so paste control must be paired with X-ray evidence.
Prototype with unstable stencil data
First article print review
Early SPI feedback helps decide whether to continue assembly or correct the paste layer before more boards are exposed.
Repeat low-volume PCBA
Trend review by lot and stencil revision
Repeat trends can point to stencil wear, paste handling, board support, or aperture design before yield drops.
Practical SPI Workflow
SPI is useful only when it changes behavior on the floor. The route below keeps inspection tied to stencil setup, production decisions, and next-lot feedback.
1
File and Stencil Review
Engineering reviews paste layers, aperture design, component pitch, pad balance, BGA/QFN risk areas, and any prior defect notes before SMT setup.
2
Printer Setup and First Print
The first boards are printed with controlled stencil alignment, board support, paste condition, squeegee settings, and wipe-frequency assumptions.
3
3D SPI Decision
SPI data is used to accept the print, clean and reprint, adjust the process, or stop for aperture and DFM review when the same defect pattern repeats.
4
Placement and Reflow Correlation
Paste findings are compared with placement quality, reflow behavior, AOI results, and X-ray review when hidden-joint packages are involved.
5
Lot Release Feedback
The final release note connects SPI status with assembly yield, rework decisions, exception handling, and the next-lot process recommendation.
Files to Send for a Useful Quote
Gerber or ODB++ package with paste layers
BOM with package sizes and manufacturer part numbers
XY placement data and assembly drawing
Stencil drawing or current stencil supplier notes
Target quantity, lot split, and delivery expectation
Known defects from prior builds, especially bridges or opens
BGA, QFN, 0201, fine-pitch, shield can, or odd-form placement notes
Required AOI, X-ray, ICT, flying probe, or functional test evidence
Transparent Scope Limits
SPI does not certify product safety, replace X-ray for hidden joints, or guarantee field reliability. It is a pre-reflow control gate that works best when the buyer accepts clear stop/go rules and the factory records why the lot continued.
Author
YourPCB Engineering Content Team
This page is written from YourPCB's SMT assembly workflow: stencil review, paste printing, 3D SPI, AOI correlation, reflow feedback, and release control for OEM PCB assembly buyers.
Quality Reference Basis
- IPC-A-610 workmanship language for assembled boards
- IPC-J-STD-001-style soldering process discipline
- ISO 9001:2015-style revision and record control
- SPI handoff through AOI, X-ray, ICT, or functional test where needed
Solder Paste Inspection FAQ
What is solder paste inspection in SMT assembly?
Solder paste inspection is a pre-reflow SMT process control step that measures whether paste deposits are present, aligned, and within the approved height, area, and volume range. It helps prevent solder defects before pick-and-place and reflow make them harder to correct.
Is SPI the same as AOI?
No. SPI checks solder paste after printing and before placement. AOI checks visual assembly conditions after placement or reflow. A strong SMT route uses SPI to prevent paste-related defects, then AOI to verify part placement and solder-joint appearance.
When should I require 3D SPI on a PCBA quote?
Require 3D SPI when the board has fine-pitch ICs, QFNs, BGAs, 0201 or 01005 passives, large thermal pads, dense mixed technology, costly components, or a prior history of opens, bridges, voiding, or tombstoning. It is also useful when the first article must prove the stencil before the whole lot runs.
Can SPI replace X-ray inspection for BGA assemblies?
No. SPI can confirm paste deposits before BGA placement and reflow, but it cannot inspect hidden solder joints after reflow. For BGA programs, SPI reduces paste-related risk before reflow while X-ray verifies hidden-joint condition after assembly.
What files do you need to quote solder paste inspection?
Send Gerber or ODB++ data with paste layers, BOM, XY placement file, assembly drawing, stencil notes, target quantity, and any previous defect records. If the program has split deliveries, include release priorities so inspection evidence can match shipment decisions.
How does SPI help when schedule risk is high?
For a Singapore robotics OEM in 2026-Q1, a PCB assembly program had a multi-PO program with split PIs, same-day payment confirmation, and an early delivery warning issued for a constrained PO. SPI status can support the same visibility model by showing whether the lot is ready to continue through SMT or needs a stop-and-correct decision before reflow.
Related Manufacturing Services
SMD PCB Assembly
Use SMT assembly when placement, paste printing, reflow, AOI, and hidden-joint process control drive the build risk.
PCB Stencil Service
Use stencil review when aperture design, paste volume, fine-pitch pads, and first-print results need correction.
BGA Soldering Service
Use BGA assembly support when paste control, reflow profiling, and X-ray evidence must work together.
Quality Assurance: FAI, 8D, PFMEA
Use quality support when inspection findings must become first article evidence, corrective action, or process-risk review.
Need SPI feedback before your SMT lot runs?
Send the build files, paste layers, BOM, and stencil notes. We will review where SPI, AOI, X-ray, or functional test should sit in the release route.
Contact YourPCB