Thermal Via Calculator
Calculate thermal resistance of via arrays for heat dissipation
mm
mm
Typical: 18-35µm (0.018-0.035mm)
mm
vias
°C/W
°C
Thermal Via Design Guidelines
Via Placement
- • Place vias directly under thermal pads
- • Use grid patterns for uniform heat distribution
- • Maintain minimum via-to-via spacing (typically 0.5-1mm)
Improving Thermal Performance
- • Fill vias with copper or conductive epoxy
- • Use larger via diameters when possible
- • Connect to internal ground/power planes
- • Add thermal relief patterns in copper pours
Thermal Via Design for PCBs
Thermal vias are plated through-holes used to transfer heat from one side of a PCB to the other, typically from a component's thermal pad to a heat-spreading copper plane or external heatsink. Proper thermal via design is critical for power electronics, LED lighting, and high-performance computing applications.
When to Use Thermal Vias
Common Applications
- • Power MOSFETs with thermal pads
- • Voltage regulators (LDOs, DC-DC)
- • High-power LEDs
- • Motor drivers
- • Processors and FPGAs
- • QFN/DFN packages with exposed pads
Design Goals
- • Minimize thermal resistance (Rth)
- • Keep junction temperature below max rating
- • Spread heat to larger copper areas
- • Enable external cooling if needed
- • Maintain manufacturability
Via Design Parameters
| Parameter | Typical Range | Effect on Thermal Performance |
|---|---|---|
| Hole Diameter | 0.2 - 0.5 mm | Larger = lower Rth, but limits via count |
| Plating Thickness | 18 - 35 µm | Thicker = lower Rth |
| Via Fill | None / Epoxy / Copper | Copper fill best, ~4× improvement |
| Board Thickness | 0.8 - 2.0 mm | Thinner = lower Rth |
| Via Count | 4 - 100+ | More vias = proportionally lower Rth |
| Via Spacing | 0.5 - 1.5 mm | Closer = more vias per area |
Via Fill Options
Non-Filled (Standard)
- • Lowest cost
- • Good for moderate thermal loads
- • May wick solder during reflow
- • Tent with solder mask if under pads
Epoxy Filled
- • Prevents solder wicking
- • Can be capped and plated over
- • Moderate thermal improvement
- • Standard option at many fabs
Copper Filled
- • Best thermal performance
- • Solid copper column
- • Higher cost
- • Ideal for high-power designs
Best Practices
- Via in Pad: For best thermal performance, place vias directly within the thermal pad. Use filled and capped vias to prevent solder voiding.
- Copper Planes: Connect vias to large internal or external copper planes to spread heat effectively. Use heavy copper (2oz+) for power applications.
- Thermal Relief: Remove thermal reliefs from via connections in thermal zones to maximize heat transfer.
- Grid Patterns: Use regular via arrays (3×3, 4×4, 5×5) for uniform heat distribution and easier design rules.
- Calculate Margins: Add 20-30% more vias than calculated minimum to account for manufacturing variations and non-ideal thermal paths.
Thermal Calculation Reference
Single Via Thermal Resistance:
Rth = L / (k × A)
Where:
- L = board thickness (m)
- k = copper thermal conductivity (385 W/m·K)
- A = copper cross-section area (m²)
Parallel Vias:
Rtotal = Rsingle / n
Power Dissipation:
P = ΔT / Rth